Reduction of Parasitic Capacitance in Vertical MOSFETs by Spacer Local Oxidation

Single, double and surround gate vertical MOSFETs with reduced parasitic capacitance

The vertical MOSFET structure is one of the solutions for reducing the channel length of transistors under 50 nm. Surround gates can be easily realised in vertical MOSFETs which offer increased channel width per unit silicon area. In this paper, a low overlap capacitance, surround gate, vertical MOSFET technology is presented. A new process that uses spacer or fillet local oxidation is develope...

Design of Double Gate Vertical MOSFET using Silicon On Insulator (SOI) Technology

Received April 27, 2012 Revised May 14, 2012 Accepted May 26, 2012 Application of symmetric double gate vertical metal oxide semiconductor field effect transistors (MOSFETs) is hindered by the parasitic overlap capacitance associated with their layout, which is considerably larger than for a lateral MOSFET on the same technology node. A simple process simulation has been developed to reduce the...

Significantly improving sub-90 nm CMOSFET performances with notch-gate enhanced high tensile-stress contact etch stop layer

Article history: Received 24 January 2008 Received in revised form 13 August 2008 Available online 1 October 2008 0026-2714/$ see front matter 2008 Elsevier Ltd. A doi:10.1016/j.microrel.2008.08.002 * Corresponding author. Tel.: +886 6 2080398; fax: E-mail addresses: [email protected] edu.tw (Y.-K. Fang). This paper reports to improve performances of sub-90 nm CMOSFETs with a notch-gat...

Nonlinear Parasitic Capacitance Modelling of High Voltage Power MOSFETs in Partial SOI Process

Effects of the Spacer Length on the High-Frequency Nanoscale Field Effect Diode performance

The performance of nanoscale Field Effect Diodes as a function of the spacer length between two gates is investigated. Our numerical results show that the Ion/Ioff ratio which is a significant parameter in digital application can be varied from 101 to 104 for S-FED as the spacer length between two gates increases whereas this ratio is approximately constant for M-FED. The high-frequency perform...